Inverters are used to convert an electrical DC voltage into a single- or multi-phase AC voltage. Inverters are applied in the photovoltaic area to be used when a DC voltage produced by solar cells is to be converted into an AC voltage for use on the public power grid.
Another application for inverters is in the operation of electric motors, particularly asynchronous motors. An inverter is used as the component of a frequency converter, which converts an AC network voltage to a higher frequency and amplitude. Most modern frequency converters are designed as converters having a constant intermediate circuit voltage. The grid-side input voltage is converted with the aid of a rectifier into a DC voltage, which is smoothed by condensers.
A plurality of circuit topologies in existence can be used to produce an AC voltage from a DC voltage. It is immaterial whether the circuit topology is dealing with an original DC voltage from, for example, a solar module or with the rectified intermediate circuit voltage of a frequency converter.
Common features to these circuit topologies is the principle that the output of the inverter is connected to different potentials by the pulsed opening and closing of electronic power switches, thereby producing a desired AC voltage.
An important quantity used to characterize the quality of inverters is their efficiency. The efficiency is the ratio of the power produced, or usable power, with respect to the supplied power, which should be as large as possible.
A significant factor limiting the attainable efficiency is represented by losses that occur in the components used, especially in the electronic power switches. Although affected by many factors, two relevant loss mechanisms play a role in the losses occurring from the power switches.
The first loss mechanism involves switching losses. A switching loss occurs at each instant of opening and closing a switch. Switching losses generally increase proportionally with the switching frequency of a switch. At a given switching frequency, a switch having a high voltage resistance, and thus being suitable for switching high voltages, produces considerably greater switching losses than a switch having a low voltage resistance.
The second loss mechanism involves conduction losses. A conduction loss arises in the conducting state of a switch. Conduction losses are proportional to the voltage drop over the switch in the conducting state, which is known as the saturation voltage. The saturation voltage decreases only slightly with the voltage resistance of the switch, and depends on other factors in addition to the voltage resistance of the switch, so that the conduction losses can be considered to depend only on the voltage resistance of the switch.
These two loss mechanisms have a different weighting in different circuit topologies. As a result, manufacturers offer semiconductor switches that are suitable to these purposes such as components like MOSFETs and IGBTs which exhibit different properties. On the one hand, some switches are optimized to achieve low switching losses with the tradeoff of a somewhat higher saturation voltage. On the other hand, other switches are optimized to obtain a lower saturation voltage with the tradeoff of somewhat higher switching losses.
FIG. 2 illustrates a conventional two-level half bridge. The two-level half bridge shown in FIG. 2 is a standard circuit topology having two power switches S1, S4 per phase. Here, as in the other examples herein, only one phase is depicted. The two-level half bridge includes a bridge output BA. Bridge output BA is alternatively connected to an upper DC voltage U_ZK+ via switch S1 and to a lower DC voltage U_ZK− via switch S4. For switching over the entire voltage swing, switches having a high voltage resistance (i.e., low conduction losses) are considered for being switches S1, S4. Relatively large switching losses occur at particular frequencies for such switches. In general, the switching losses are dominant in typical inverter and rectifier applications in which switches such as switches S1, S4 of the two-level half bridge are employed.
Another conventional circuit topology for a phase connection of an inverter is the multilevel topology. FIGS. 3a and 3b illustrate the “neutral-point point-clamped” three-level topology, which represents a relatively simple and useful embodiment of a multilevel topology. This three-level topology includes four power switches S1, S2, S3, S4 and two diodes D1, D2 per phase.
In this three-level topology, the voltage swings during the switching of an individual switch always correspond to only half the entire voltage swing U_ZK+-U_ZK−. Consequently, power switches that require only half the voltage resistance (i.e., low switching losses) for the same overall voltage swing as compared to the two-level half bridge topology described with respect to FIG. 2 can be used. Such switches with relatively low voltage resistances generally produce distinctly smaller switching losses than switches with higher voltage resistances at the same switching frequency. The total switching losses for this three-level circuit topology are also smaller than that of the two-level half bridge topology.
On the other hand, however, in this three-level circuit topology current flows through two semiconductor devices at any given time in the conducting state of a power switch(es). In particular, the current flows through either two power switches such as switches S1 and S2 as shown in FIG. 3a or one diode and one power switch such as diode D1 and switch S2. The conduction losses for a three-level topology are thus greater than for a two-level topology. In general, for typical inverter and rectifier applications, the conduction losses are dominant in the three-level topology.
For the same power loss, the multilevel (e.g., three-level) topologies enable operation at higher switching frequencies than the two-level topology. This enables smaller and cheaper passive components to be used. Such components require less space and help reduce ripple in the output voltage. Based on such factors, multilevel topologies continue to be used more often in spite of the limitation in the efficiency due to conduction losses as described above.